Stradis 4:2:2 MPEG-2 50Mbps Hardware Decoder Driver Development Diary
In case anyone is curious, the Stradis board is a PROFESSIONAL decoder,
not one of those consumer-level 15Mbps 4:2:0 decoders.  It runs through
MPEG streams that make other boards choke.   Click on the Stradis link
above for the full specifications.  Don't expect to get this one for $150.
I'm told the single unit pricing is at $1500.

Alan Cox updated the driver for kernel version 2.3 and it has been
submitted to Linus Torvalds for inclusion into the development kernels.
Next snapshot should appear in the next development kernel with any
luck.  (I realize all of your projects are probably on the "stable"
2.2.x kernels, so the driver will show up in 2.2.x later as well)

I've accepted a new job.  I will be moving to California before
the 15th of the month.  Driver development will continue but
things may be rough while all of my stuff is in transit.

1PM  New snapshot.  Fixes some small bugs with respect to sync.

10AM New snapshot.   Contains a new "playprogram" utility that
will play all program streams with much less memory usage than
"parsempeg".   A new system stream parser is in the works, OSD
will hopefully be fully functional by next snapshot.

Fixed sync issues.   Use new ioctl EOF to mark end for driver.
Example code in parsempeg and playtransport code.  Tested to work in
audio master and no master sync modes.

Demoed at Atlanta Linux Showcase

9AM Made another snapshot just to be sure everyone has the same source
tree that I am working from.

Corrected support for volume setting ioctl to use the CS4341 volume
control if present, otherwise the IBM volume control.  Fixed a bug
in the ioctl to read the volume (a bit wasn't being set).  Volume
settings are (65535 - x*256) where x is the attenuation level in
dB desired.

Rewrote VGA overlay scaling code.  Now scales properly to all sizes on
overlay.  Hacked out OSD tester, so experiment with OSD at your own risk.
DO NOT try to use OSD on a production box yet, as it can freeze the driver.
Added ioctls that xawtv seems to (wrongly) depend on so that xawtv may
be used for VGA overlay.

New snapshot, new transport stream parser that only uses 300k resident
to prevent swapping on huge transport streams.  Also allows you to take
input from a named pipe now.

4PM Removed problem with ibm getting annoyed.
added reset ioctl

9PM New Snapshot.  New ioctls finished.  Genlock now allows -500 to +500 fine
adjustments.  You can now set the master sync mode as well as the first and
last active scanlines for tweaking the output (if all of your files are
encoded with 512 active scanlines, for example).   All of the special feature
modes (fast forward, single step, slow motion single frame advance, freeze
frame) appear to work fine for video elementary streams and some program
streams but sometimes the IBM chip will get confused if the timing of
these ioctls is wrong, so use with caution.  I'm working on this.

The VIDIOCSPLAYMODE ioctl has changed, be sure you recompile all your code
against the new videodev.h (you should copy it to /usr/include/linux as it
says in the README)

1PM New snapshot with revised video timings that should be correct now.

Reverted to old threshold management code to fix freeze-up on faster

Put up testing snapshot that turns the D4 led off at initialization
to help in debugging problems.

1AM: went to sleep with driver stress test running.   Found one bug
already in dealing with the ends of files that aren't properly 
encoded (where either the audio or video is longer).  Will deal with
it Wednesday after the paper is complete.

Driver works!   Looks like the stuff below on init now (your bitfiles
may vary):

stradis0: rev 1, addr=fe6ffe00, irq=16, vidmem=00000000
PCI: Enabling bus mastering for device 02:20
stradis1: rev 1, addr=febfde00, irq=16, vidmem=00000000
PCI: Enabling bus mastering for device 00:98
stradis2: rev 1, addr=febfdc00, irq=17, vidmem=00000000
PCI: Enabling bus mastering for device 00:a0
stradis: 3 card(s) found.
stradis0: loading decxl
stradis0: awaiting 2nd FPGA bitfile
stradis2: loading decxl
stradis2: awaiting 2nd FPGA bitfile
stradis0: loading decxldva
stradis0: FPGA Loaded
stradis0: CS8420 initialized
stradis0: CS4341 initialized (0)
stradis2: loading decxldva
stradis2: FPGA Loaded
stradis2: CS8420 initialized
stradis2: CS4341 initialized (0)
stradis1: FPGA Loaded
stradis0: IBM MPEGCD21 Initialized
stradis1: IBM MPEGCD21 Initialized
stradis2: IBM MPEGCD21 Initialized

Paper for ALS is due the 8th.  Writing in a hurry.  I expected to hear
some sort of feedback on my original paper long before the due date,
and then the date just came up and surprised me.

3PM: corrected CS4341 so that typical output is +4dB like all the other
professional stuff I have -- so unity gain on my mixer reports all the
proper levels for balanced audio outputs, and unbalanced is now
comfortable to listen to with headphones.  left todo:  update volume
control ioctl and add in finegrain genlock ioctl and implement the
remaining do-nothing ioctls in the driver

2PM: Digital audio output works, balanced audio output works, unbalanced
audio output works, vga overlay works, SDI video output reported to
work.   I'm not quite sure on the balanced outputs, but at unity gain
they appear to be +19dB.   I would expect them to be at -10dB or +4dB,
so either I have some settings wrong or the mpeg files I am using to
test were recorded at an almost saturated level.  My mixer corrects
the level quite nicely back down to 0dB and sound output is beautiful.

9PM: Digital audio output is working, balanced audio output still doesn't
seem to work but my cable may be wired wrong.  VGA overlay is working
on the new cards and old (though the new one has a slight offset), and
I don't seem to be getting any unbalanced audio output, and I cannot
check the SDI video output

5PM: Mystery of random failures on init of the new card solved -- relocated
the saa7121 init so that it happens AFTER the IBM chip is completely
setup.  Still seem to be plagued with irq loops on the new card (but not
on the old card).   Cards consistently work now.

1PM: Mixed two new cards and old one card mixed in the same system for
testing.   Everyone seems happy after cold boot, but random new cards
get upset at random intervals and don't let me talk to the IBM chip

8PM: I have NTSC playback working on the new decoder board, PAL mode
generates accurate PAL signal, but I've not tested PAL MPEG files yet.
The SDI output is still untested -- If you use SDI with this board in
Linux, please get the new snapshot above and email a report to me.  The
audio isn't yet initialized on the new board so it may or may not be
working properly.  If it is working, I would be surprised.
I hope to finish the remaining issues Saturday.

5PM: I have partial functionality of the new card with the latest
snapshot above.  Work continues.  Remaining are the various audio changes
and the proper SAA7121 init sequence for the new card, and VGA overlay
on the new card doesn't yet seem to work.

3AM: I am back in Atlanta now.   I will be working closely with Stradis
on getting the new mpeg decoder cards supported by Monday, hopefully.
Placed a new snapshot up today with some more code to support the 
new cards, but alas, I'm not quite finished, so don't expect the new
rev2 boards to work, but you will see the config info read off the
board and spewed to the logs.

Still on the road.  I return Thursday to Atlanta.  The new revision
of the decoder will occupy 100% of my free time until complete.

Uploaded a new snapshot today to fix the EOF errors.  Check it out.
Hardware problems from lightning while in canada are finally solved.
A modem faster than 2400bps is now in service again.  Web site designers
should be forced to use 2400.

Back from the symposium.   Didn't have any time there to hack on the
driver at the symposium.   Found that I2CRead in the stradis driver was
never really tested except to poll the i2c bus for devices.  It turns out
that it didn't really work.

Got a hold of the newest Stradis decoder board and new driver source code
for Windows.  Hope to make it work before Ottawa Linux Symposium.

Here's what it looks like currently with one new and one old card:

stradis0: rev 1, addr=41200000, irq=11
stradis1: rev 1, addr=41100000, irq=11
stradis: 2 card(s) found.
stradis0: i2c: device found=88
stradis1: i2c: device found=a0
stradis0: FPGA Loaded
stradis1: FPGA Loaded
stradis0: IBM MPEGCD21 Initialized
stradis1: IBM config failed

Obviously the new card uses different FPGA code as well as including several
new i2c controlled devices.  Optimistically, this could all be working by
Sunday night.

Uploaded a new mpeg2.tar.gz snapshot with binaries for those with problems

Serious thunderstorms prevented work as power was lost repeatedly.
Began work revising the submitted conference paper (before even
receiving word from ALS).

Visited the former site of the 1996 Olympic bombing and saw the noisest
fireworks ever as they echoed off a nearby tall building.   Not the most
spectacular show, but different from the average fare.

Conference paper finished and submitted at 7AM.  Sleep is now

Spent the day writing the paper for Ottawa Linux Symposium and Atlanta
Linux Showcase.   Wrote the user-land fpga/microcode loader and it works:

stradis0: rev 1, addr=febfde00, irq=16, vidmem=00000000
PCI: Enabling bus mastering for device 00:98
stradis: 1 card(s) found.
stradis0: i2c: device found=88
stradis0: FPGA Loaded
stradis0: IBM MPEGCD21 Initialized

A pretty sight.  Uploaded a new snapshot.

I just remembered June has 30 days and I have one less day to finish
writing my paper than I thought.   Hacking out 5000 words by midnight

Been busy writing paper for OLS and ALS (see banner above).
Finishing up FPGA/microcode loader.

Started documentation, still working on FPGA/microcode loader ioctl,
finished up statistics collection.  Started a reference playback
application to demonstrate the use of the driver.

Work began on statistics collection and on screen display overlay.
Began moving the FPGA code from the kernel into user space.  It does
not belong in the kernel.  We want the using application to be able to
load whatever FPGA code it might need.

The driver is now fully functional.   Only some minor vga scaling
issues remain.  On the user-side, a gui is in the works.

I tested six cards on a dual pIII550 system all with 40Mbps streams with
no problems for over 48 hours.   This is quite a feast for the eyes
watching this.

Revision 2 of the Stradis board is not yet supported, but I expect access
to a new board within a few weeks and hope to have all the necessary changes
to the driver made within the same time.

If all goes to plan, this driver should be a standard part of the main
Linux source tree within the next two or three versions.  Potentially
2.2.13 or 2.2.14.

Copyight 1999